1. Field of the Invention
The present invention relates to a semiconductor device and a semiconductor package having the same, and more particularly to a semiconductor device having protruded via, and a semiconductor package having the same.
2. Description of the Related Art
FIGS. 1 to 13 show schematic views of a conventional semiconductor process for making a semiconductor device. Referring to FIG. 1, a semiconductor substrate 10 is provided. The semiconductor wafer 10 has a plurality of through-silicon vias 11 therein, and each of the through-silicon vias 11 is surrounded by a liner 12. Referring to FIG. 2, the through-silicon vias 11 and the liners 12 are exposed by a thinning process applied on the semiconductor substrate 10, so that the through-silicon vias 11 and the liners 12 protrude from one side surface of the semiconductor substrate 10. Referring to FIG. 3, a first isolation film 131 is formed over the side surface of the semiconductor substrate 10. Referring to FIG. 4, part of the first isolation film 131 and the liner 12 are removed, so that the top surface of the liner 12 is coplanar with the top surface of the first isolation film 131, and the through-silicon vias 11 protrude from top surface of the first isolation film 131. Referring to FIG. 5, a seed layer 14 is formed over the top surface of the isolation film 131 and the exposed portions of the through-silicon vias 11. Referring to FIG. 6, a first patterned mask 151 is formed over the seed layer 14. The first patterned mask 151 has a plurality of openings 152. The bottom portion of each of the openings 152 is wider than the top portion of each of the openings 152. Referring to FIG. 7, a plurality of conductive elements 16 are formed in the openings 152. Referring to FIG. 8, the first patterned mask 151 is removed. Referring to FIG. 9, the exposed portions of the seed layer 14 are removed. Referring to FIG. 10, a second isolation film 132 is formed over the conductive elements 16 and the top surface of the first isolation film 131. Referring to FIG. 11, a second patterned mask 153 is formed over the first isolation film 131. Referring to FIG. 12, the second isolation film 132 is patterned and the second patterned mask 153 is removed. Referring to FIG. 13, a metal layer 17 is formed on the conductive elements 16. The metal layer 17 is formed of a metal or metal alloy, such as Ni, AuSu, Au, or the like, using electroless plating techniques.